June 14, 2026

Cadence Introduces Industry’s First Fully Autonomous Virtual Engineer for Chip Design Powered by NVIDIA

Cadence_Computex

At COMPUTEX 2026, Cadence announced a major advancement in semiconductor development with the introduction of the industry’s first fully autonomous virtual AI engineer for chip design. Built on the company’s ChipStack™ AI Super Agent framework and powered by NVIDIA technologies, the new solution brings Level-5 autonomous capabilities to electronic design automation (EDA).

Developed using Cadence’s AI-driven EDA portfolio together with NVIDIA Nemotron models and secured through NVIDIA OpenShell runtime, the platform enables automated chip design and verification workflows with minimal human intervention.

The new ChipStack AI Super Agent can independently manage complex engineering processes including specification analysis, RTL generation, simulation, verification planning, debugging, and design optimization. Instead of relying on manual prompts, the system continuously evaluates outcomes and determines the next actions autonomously while allowing engineers to monitor and guide progress when needed.

According to Cadence, the technology significantly accelerates semiconductor validation cycles. At NVIDIA, engineers currently perform millions of verification tests annually, and the new autonomous workflow enables hundreds of simulations to run automatically through Cadence Xcelium Logic Simulation and Jasper Formal Verification. This can reduce a traditional five-week verification process to less than a day while delivering more than 40 times faster RTL validation.

A key advantage of the platform is its reliance on Cadence’s physics-based, signoff-accurate design engines, ensuring AI-generated outcomes remain grounded in trusted engineering methods. Security is further strengthened through NVIDIA OpenShell, which provides governance controls, protected access, and secure handling of sensitive design data.

Cadence says the launch marks the next stage of AI evolution in semiconductor design — moving from AI assistants to autonomous virtual engineers capable of executing real engineering workloads.

The Level-5 autonomous capabilities of ChipStack AI Super Agent and AgentStack orchestration framework are expected to enter early-access availability during the second half of 2026.